Search - verilog uart

[Other resource] micro uart

Description: 硬件uart源程序verilog HDL，即相关文档-hardware UART Verilog HDL source, that the relevant documents
Platform: | Size: 342886 | Author: 陈正一 | Hits:

[Communication] verilog for uart

Description: 通用异步接收器/发送器(UART)是能够编程以控制计算机到附加串行设备的接口的微芯片。详细来说,它提供给计算机RS-...还有高级的UART提供了一定数量的数据缓冲,这样计算机和串行设备数据流就可以保持同样的速度。-universal asynchronous receiver / transmitter (UART) can be programmed to control computer attached to the serial device interface microchips. Details, provide it to the computer RS-High ... UART also provide a certain number of data buffer, computer equipment and serial data stream can maintain the same speed.
Platform: | Size: 9682 | Author: 李志 | Hits:

[Other resource] u-uart

Description: 一个可综合的串并转换接口verilog源代码-a comprehensive series of conversion and interface Verilog source code
Platform: | Size: 5599 | Author: 李文文 | Hits:

[VHDL-FPGA-Verilog] uart_test_Verilog

Description: 用verilog实现了uart功能的demo工程。工程使用的IDE为“ISE Design Suite 14.7”，使用时可根据自己硬件，修改引脚配置即可。(The demo project of UART function is realized with Verilog. The IDE used in the project is "ISE Design Suite 14.7", which can be used to modify the pin configuration according to its own hardware.)
Platform: | Size: 128000 | Author: shaoyang_v | Hits:

[VHDL-FPGA-Verilog] Receiver_spartn6_v1

Description: Implement design of UART receiver in verilog
Platform: | Size: 40960 | Author: Armaghan | Hits:

[VHDL-FPGA-Verilog] uart

Description: uart串口FPGA实现示例 example(uart serial interface example)
Platform: | Size: 10240 | Author: davidren | Hits:

[VHDL-FPGA-Verilog] uart

Description: 用verilog实现UART串口收发。状态机形式实现，波特率可调(Use verilog to achieve UART serial transceiver. State machine form, adjustable baud rate)
Platform: | Size: 3265536 | Author: zhaodameng | Hits:

[Com Port] UART发送接收奇偶校验

Description: 状态机，串口收发，以及奇偶校验。 even_parity.v奇偶校验； receive_byte.v字节接收； send_byte.v字节发送(state machine,UART even_parity.v even parity; receive_byte.v receiving byte; send_byte.v sending byte)
Platform: | Size: 2048 | Author: 陈宇晨 | Hits:

[Other] verilog

Description: lcd1602 12864显示程序代码，串口传输数据代码(lcd1602 12864 code,UART code.)
Platform: | Size: 7168 | Author: 打蛋器 | Hits:

[Internet-Network] apb-uart

Description: apb—uart模块，实现中断处理和异步收发数据并处理(APB - UART module, interrupting processing and asynchronous receiving and receiving data and processing)
Platform: | Size: 4096 | Author: 王大柱 | Hits:

[VHDL-FPGA-Verilog] uart

Description: 此上传文件实现的功能就是FPGA里实现从PC接收数据，然后把接收到的数据发回去。使用的是串口UART协议进行收发数据。(The function of this upload file is to receive data from PC in FPGA and send back the received data.The serial port UART protocol is used to receive and receive data.)
Platform: | Size: 1649664 | Author: 木子桶 | Hits:

[Com Port] 12345 keyuart

Description: verilog实现uart串口编程 FPGA板与PC传输数据(verilog uart processing FPGA and PC communication)
Platform: | Size: 6504448 | Author: `m | Hits:

[VHDL-FPGA-Verilog] UART_FPGA

Description: FPGA下的UART串口通信协议及控制器设计(UART serial communication protocol and controller design under FPGA)
Platform: | Size: 1024 | Author: Dream0 | Hits:

[Documents] 黑金Sparten6开发板Verilog教程V1.6

Description: 黑金spartan的开发板教程，包含了各类接口如spi，uart，vga的用例，以及各项存储器如flash，ddr的操作方法(spartan 6 example design)
Platform: | Size: 19894272 | Author: 爱的分啥 | Hits:

[VHDL-FPGA-Verilog] PC2FPGA_UART_Test

Description: 基于 fpga 的 uart 设计波特率 115200(UART design based on FPGA)
Platform: | Size: 6004736 | Author: 梦里千梦 | Hits:

[VHDL-FPGA-Verilog] uart

Description: RS232接口，uart用verilog语言实现(RS232 interface, uart with verilog language)
Platform: | Size: 1830912 | Author: yeyeyeyeye | Hits:

[VHDL-FPGA-Verilog] Uart-Verilog

Description: verilog实现串口通讯，包括verilog代码和testbench代码(verilog serial communication, including the verilog code and testbench Code)
Platform: | Size: 791552 | Author: 代工 | Hits:

[VHDL-FPGA-Verilog] VerilogUart_Modelsim

Description: 使用Verilog编写的UART ，用Modelsim仿真工程。(use Verilog Write UART Program, Modelsim simmulate the project)
Platform: | Size: 47104 | Author: myBuf | Hits:

[VHDL-FPGA-Verilog] apb_uart

Description: 这里是apb总线设计代码。这个源程序是基于verilog语言设计的(Here is the APB bus design code. This source program is designed based on Verilog language)
Platform: | Size: 2048 | Author: megmand | Hits:

[VHDL-FPGA-Verilog] uart

Description: 电脑端发送数据与FPGA接收数据程序，uart模块，以及一部分项目里包含的其他的程序(Program for sending data from computer and receiving data by FPGA, UART module)
Platform: | Size: 18400256 | Author: godxun | Hits:

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[Other resource] micro uart

[Communication] verilog for uart

[Other resource] u-uart

[VHDL-FPGA-Verilog] uart_test_Verilog

[VHDL-FPGA-Verilog] Receiver_spartn6_v1

[VHDL-FPGA-Verilog] uart

[VHDL-FPGA-Verilog] uart

[Com Port] UART发送接收奇偶校验

[Other] verilog

[Internet-Network] apb-uart

[VHDL-FPGA-Verilog] uart

[Com Port] 12345 keyuart

[VHDL-FPGA-Verilog] UART_FPGA

[Documents] 黑金Sparten6开发板Verilog教程V1.6

[VHDL-FPGA-Verilog] PC2FPGA_UART_Test

[VHDL-FPGA-Verilog] uart

[VHDL-FPGA-Verilog] Uart-Verilog

[VHDL-FPGA-Verilog] VerilogUart_Modelsim

[VHDL-FPGA-Verilog] apb_uart

[VHDL-FPGA-Verilog] uart

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